1. Field of the Invention
The present invention relates to a circuit board for use in various audio-visual (AV for short) equipment, household electrical appliances, communications equipment, computer apparatuses, peripheral equipment thereof, and so forth, and more particularly to a circuit board on which a silicon chip is flip-chip mounted and a mounting structure.
2. Description of the Related Art
A circuit board has hitherto been used for a hybrid integrated circuit that constitutes a predetermined electronic circuit by mounting a multiplicity of active elements as typified by a semiconductor device such as IC (Integrated Circuit) and LSI (Large Scale Integration) and passive elements such as capacitative elements and resistive elements. This circuit board is customarily manufactured as follows. (1) A substrate constituted by bonding a copper foil to both of upper and lower surfaces of an insulating substrate formed of an epoxy resin-impregnated glass cloth, namely a both-side copper-clad substrate, is processed into a circuit conductor in the form of circuit pattern by the subtractive method. (2) After that, a through-hole which passes completely through the circuit conductor and the insulating substrate is created by a drill, and a conductor layer is laminated inside the through-hole by the plating method thereby to form a through conductor, whereupon a base body is fabricated. (3) On a main surface of the base body is stacked an insulating layer called solder resist. In this way, a circuit board is manufactured (refer to Japanese Unexamined Patent Publications JP-A 2002-198658 and JP-A 2002-212394, for example).
Alternatively, in order to obtain a higher circuit density, a build-up portion may be formed by repeating the following process steps. That is, an insulating layer made of epoxy resin or the like material is stacked on the main surface of the base body fabricated through the step (2) described above, and a through-hole (via-hole) is created in the insulating layer by application of laser light. After that, a conductor layer is formed inside the through-hole by the plating method, and a circuit conductor is formed on a surface of the insulating layer. Also in this way, a circuit board may be manufactured (refer to Japanese Unexamined Patent Publication JP-A 2005-86164, for example).
A multilayer circuit board is customarily manufactured as follows. An insulating layer is formed on an inner-layer circuit substrate having an inner layer circuit formed therein. A metal layer is formed thereon and a hole is so formed as to pass completely through the circuit board as a whole, or a via-hole is so formed as to reach the inner layer circuit thereby to provide electrical connection between the inner layer circuit and a metal foil. Then, unnecessary parts of the metal foil are removed by means of etching. However, a typical insulating material exhibits a thermal expansion coefficient of approximately 16 ppm/° C., whereas a silicon chip exhibits a thermal expansion coefficient of 3 ppm/° C.; that is, there is a significant difference therebetween. Recently, in keeping with advancement of higher speed, higher performance LSI, there is a tendency to use a low-dielectric-constant material for a silicon surface. Although a material which exhibits the lowest dielectric constant is air, due to a problem associated with circuit maintenance, there is a trend to use, as a candidate low-dielectric-constant material, a material containing many bubbles. A low-dielectric-constant material containing many bubbles is low in strength. Therefore, if a silicon chip employing such a bubble-containing low-dielectric-constant material is flip-chip mounted on a substrate of conventional design, due to the difference in thermal expansion coefficient between the board and the silicon chip, a crack may be developed in the low-dielectric-constant material on the silicon chip surface during a cooling process subsequent to the flip-chip mounting. This gives rise to a problem of occurrence of a break in a circuit.
Accordingly, a package for mounting a silicon chip employing a bubble-containing low-dielectric-constant material needs to be so designed that a difference in thermal expansion coefficient with respect to the silicon chip is minimized to avoid occurrence of thermal stress in the silicon chip. The package substrate is thus required to exhibit a thermal expansion coefficient which is nearly the same as that of the silicon chip.
Moreover, LSI is designed to deal with lots of data at one time and thus tends to grow in size. An increase in size of LSI necessitates an increase in number of I/O (Input/Output) for performing data input and data output. While the number of I/O is currently several thousand, it is expected to reach ten thousand in the future. Therefore, a part of connection between a semiconductor element and a circuit board (bump) tends to be down-sized, and more specifically, a bump which is currently 100 μm in diameter and 220 μm in pitch will hereinafter be required to have a diameter in a range of 50 μm or above and 75 μm or below and a pitch in a range of 100 μm or above and 125 μm or below. Bump downsizing leads to deterioration of mechanical strength and to a decrease in silicon chip-to-board distance. After all, due to the difference in thermal expansion coefficient between the board and the silicon chip, rupture takes place in the bump as the result of repeated heating and cooling operations during the use of the product, which results in a break in a circuit. This gives rise to a problem of system halt.
Accordingly, a package for mounting a silicon chip which has a larger number of I/O and thus requires a bump of smaller size needs to be so designed that a difference in thermal expansion coefficient with respect to the silicon chip is minimized to avoid occurrence of thermal stress in the silicon chip. The circuit board is thus required to exhibit a thermal expansion coefficient which is nearly the same as that of the silicon chip.
However, the following problems are posed. In a typical insulating substrate formed of an epoxy resin-impregnated glass cloth, the thermal expansion coefficient of the glass cloth is so large that it is difficult to obtain a thermal expansion coefficient which is equivalent to that of the silicon chip. Furthermore, because of the difficulty in performing drilling on the glass cloth with use of a drill or laser light, there is a limit to the extent of through-conductor microfabrication. In addition, it is difficult to form through conductors of uniform pore diameter due to lack of uniformity in the thickness of the glass cloth.